Mentor extends Tessent for debug and automotive pattern generation

By TDF Editor |  No Comments  |  Posted: October 29, 2018
Topics/Categories: Tested Component to System  |  Tags: , , , ,  | Organizations: , ,

Mentor, a Siemens business, has unveiled a brace of enhancements to its Tessent test family as this year's International Test Conference kicks off. The technologies will also be described at ITC in Phoenix.

Today (October 29), the company has released detail on automotive-level automated test pattern generation (ATPG) for the Tessent TestKompress product. Late last week, it added ATE-Connect technology to Tessent Silicon Insight, to speed IJTAG debug and bridge an abstraction gap.

Tessent automotive-grade ATPG

The automotive enhancement addresses the stringent 'zero defective parts per million' (Z-DPPM) requirements of the ISO 26262 functional safety standard. It comprises new fault models and ATPG applications developed with foundries, automotive chip manufacturers and other leading players.

These work in conjunction with existing cell- and layout-aware features within TestKompress, and target defects at the transistor level inside cells, between adjacent cells, and in the interconnect based on critical area.

Long-time automotive specialist ON Semiconductor worked with Mentor to develop the ATPG features. Peter Maxwell, a senior member of its technical staff, described the value of the enhancements.

"We have found that the bridge component alone reduces scan-related DPPMs by more than 700 compared even to cell-aware patterns, and cell-neighborhood patterns can be used to reduce DPPMs even further," he said. "In the automotive environment of defects per billion, even defects with low probability of occurrence need to be targeted in manufacturing test.”

Tessent ATE-Connect brings IJTAG harmony

In the broader test environment, ATE-Connect bridges a gap between how test engineers and dedicated DFT engineers approach their work. Test engineers work at a lower, more detailed level based on clock cycles; DFT engineers abstract their work upwards based around the increasingly popular IJTAG (IEEE 1687) standard.

Moreover, different test tools and company-specific strategies apply in these environments. This can all lead to delay and confusion.

ATE-Connect has been developed as a standard interface to translate work between the most appropriate environments. Already, Teradyne has adopted the technology to work with its UltraFLEX automated test equipment (ATE) products through the PortBridge interface.

ATE-Connect uses the established TCP/IP network protocol. It sends IJTAG commands to the device under test and receives data from the device on the ATE – meanwhile the detailed design information rests in the realm of the Tessent SiliconInsight tool. Only the necessary stimulus is sent to the device under test on the ATE.

Alongside the ITC presentation, Mentor has published more detail about ATE-Connect on the SiliconInsight website.

 

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