IP choice drives SSD controller design

By TDF Editor |  No Comments  |  Posted: December 8, 2017
Topics/Categories: Case Study, Blog - IP  |  Tags: , , ,  | Organizations: ,

A two-year-old design house has used a suite of Synopsys DesignWare IP to build an enterprise SSD controller from scratch.

Starblaze Technology, based in Beijing with R&D in Shanghai/Chengdu, wants to be a world-class SSD controller/solution design house, making small, fast, flexible and secure SoCs that speed up SSD-based storage in enterprise data centres.

The company chose a range of Synopsys DesignWare processor, foundation, security and interface IP to speed up the design process for the SoC, which was a first-pass success.

The STAR1000 SSD controller is an enterprise NVMe controller for SSDs of up to 8Tbyte. It supports PCIe Gen3x4 NVMe 1.2 and all NAND flash (MLC 3D TLC) with the StarLDPC ECC engine. The controller can also handle real-time data encryption to XTS-AES256 standards, as well as supporting SHA256 and RSA.

The SoC uses a multicore implementation of Synopsys’ ARC HS38 processor to do the resource sharing and scheduling needed to achieve the required input/output performance. Starblaze added custom instructions using the core’s processor-extensions technology to cut the SoC’s power usage and I/O latencies. It also implemented a 40bit physical address extension to support 1Tbyte of physical memory.

The company used the core’s support for onchip error correction code to make access to the embedded memories more reliable.

DesignWare Foundation IP was used to provide logic libraries and embedded memories. Star blaze chose the DesignWare high-performance core design kits, which provide high speed and density memory instances and standard-cell libraries with multi-bit flip flops, to enable the design of dense, fast, low-power DSP cores. The embedded memory instances also have power-management features.

For security, the SoC uses the standards-compliant DesignWare True Random Number Generator, which is FIPS 140-2 certified for use in customer premises. This high-quality entropy source enables the generation of the strong keys needed for the security features of an enterprise storage SoC.

Interfaces were implemented using silicon-proven DesignWare IP for the DDR4 and PCI Express 3.1 standards.

The DDR4 IP supports high-capacity DDR4 and DDR4 3D-stacked DRAM.

The PCI Express 3.1 IP supports a feature called single root I/O virtualization, which makes it easier to share an SSD across multiple CPUs or operating systems.

To find out more, click here.

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