HCC adds web, mail, time services to ‘reliable’ network stack and extends flash support

HCC Embedded has extended the TCP/IP stack the company wrote using MISRA rules and formalized V-model processes to include web server, mail, time, and network management protocols.

The new modules cover the HTTP, SMTP, SNTP/NTP, and SNMP protocols, all coming with security options enabling them to be used with HCC’s verifiable TLS and Encryption Manager, which was launched at ARM TechCon last year.

All of the network-protocols modules are supplied with with process verification documents such as a fully MISRA-compliant static- and dynamic-code analysis report. Full software life-cycle documentation is also available and can be licensed as a separate component. This verification shows that the software has been developed and tested according to strong process rules and is not vulnerable to the weaknesses and security breaches that can result as a consequence of what HCC CEO Dave Hughes calls “freestyle coding”.

Hughes added: “Too many networking quality and security issues are caused by lack of process and methodology in the stack development. HCC takes high-quality software seriously and provides evidence to support the integrity of the code.”

All protocols are developed to their respective RFCs and use test suites that verify not only interoperability but also the integrity of the code. HCC decided to implement time-synchronization protocols to extends the range of applications that can be implemented using the stack. Embedded HTTP server and mail functionality with such a high level of documented quality is rare, the company claimed.

Microcontroller targets

The HCC TCP/IPv4 and IPv6 implementations are designed especially for microcontrollers, for a low-memory footprint that can be as low as 20kbyte of ROM and 8kbyte of RAM. It uses a standard socket interface to eases integration with upper-layer software.

Separately, the company has extended its flash memory support to provide fail-safe filesystem support for eMMC devices as well as secure-erase functions. Although eMMC handles bad-block management, wear leveling, and error correction (ECC), greatly simplifying system design, HCC extends this to provide a ‘reliable write’ feature and provide configurable control what happens following a sudden power loss.

HCC said it has adopted a rigorous validation process that uses custom test hardware with a verification suite for exercising file systems with eMMC devices. Developers can use the test suite to induce hardware errors and unexpected resets to verify fail-safe behavior and recovery.

To further aid the test and validation process for customers, HCC has developed a range of printed circuit boards to mount ball grid array (BGA) eMMC chips. These boards can be plugged into a wide range of standard development board sockets such as MMC/SD interfaces, as well as HCC’s eMMC test and verification platform, thereby eliminating the expense of acquiring pre-installed eMMC boards.