TSMC and Xilinx forge tighter bonds to speed up finFET port

By Chris Edwards |  No Comments  |  Posted: May 29, 2013
Topics/Categories: Blog - EDA, Embedded, PCB  |  Tags: , , ,  | Organizations: ,

Xilinx is to use TSMC as its foundry for forthcoming finFET-based field programmable gate arrays (FPGAs), with the companies forming a single engineering team to attempt to bring forward the date of introduction.

Longstanding TSMC customer Altera inked a deal with Intel to use the chip giant’s 14nm process earlier this year that effectively locked Xilinx out of using the Intel process.

Xilinx has named the project to make its finFETs on 16nm ‘FinFast.’ TSMC and Xilinx will work together to co-optimize the finFET process and Xilinx’s UltraScale architecture. By doing this, they expect to deliver test chips later in 2013 with the first product arriving in 2014.

The companies are continuing work on 3D integration, using TSMC’s CoWoS 3D-IC manufacturing flow. Xilinx said products from this collaboration will be announced at a later date.

“I am extremely confident that our ‘FinFast’ collaboration with TSMC on 16-nanometer will bring the same leadership results that we enjoyed at previous advanced technologies,” said Moshe Gavrielov, president and CEO of Xilinx. “We are committed to TSMC as the clear foundry leader in every dimension, from process technology to design enablement, service, support, quality, and delivery.”

Morris Chang, TSMC chairman and CEO, added: “Together we will deliver world-class products on TSMC’s 20SoC technology in 2013 and on 16FinFET technology in 2014.”

TSMC recently said that it aims to accelerate the production schedule of its 16FinFET process to 2013.

Comments are closed.

PLATINUM SPONSORS

Synopsys Cadence Design Systems Siemens EDA
View All Sponsors